Home / Guides / ASIL decomposition through FTA
ISO 26262 · Worked example

ASIL decomposition through fault tree analysis

ISO 26262's ASIL decomposition rule is the most-used and most-misused mechanism in automotive functional safety. Used correctly, it lets a single ASIL D safety goal be implemented by two ASIL B safety mechanisms — substantially cheaper than building one ASIL D component end-to-end. Used incorrectly, it produces a safety case that meets the standard's letter while quietly violating its spirit. The mechanism that decides whether a decomposition is real or a paper exercise is independence between the two mechanisms, and the technique that proves independence to a reviewer is fault tree analysis. This guide walks the rule, the independence requirement, and a worked Automatic Emergency Braking decomposition end-to-end.

≈ 18 min read Worked example: AEB system (ASIL D) Standards: ISO 26262 Part 9 §5

Why decomposition exists at all

ASIL D is expensive. Hardware development to ASIL D requires per-element diagnostic coverage above 99%, latent fault metric above 90%, single-point fault metric above 99%, and PMHF (probabilistic metric for hardware failures) below 10⁻⁸/h. Software development to ASIL D mandates formal methods or at minimum strong static analysis, control-flow monitoring, and an extensive set of techniques in Part 6 Annex C that simply don't apply at lower ASILs. The cost differential between an ASIL B component and an ASIL D component of equivalent function is routinely 3–5×, sometimes more for novel hardware.

Decomposition trades that cost for architectural complexity. The idea: if a single ASIL D safety goal is enforced by two safety mechanisms whose failures are independent, then violating the safety goal requires both mechanisms to fail simultaneously. The combined failure rate is the product of the individual rates, so the two mechanisms can each be developed at a lower ASIL — provided the sum of their ASILs equals the parent.

The decomposition rule (ISO 26262-9:2018 §5.4) is a small table:

Parent ASILAllowed decompositions
ASIL DASIL C(D) + ASIL A(D)
ASIL B(D) + ASIL B(D)
ASIL D(D) + QM(D)
ASIL CASIL B(C) + ASIL A(C)
ASIL C(C) + QM(C)
ASIL BASIL A(B) + ASIL A(B)
ASIL B(B) + QM(B)
ASIL AASIL A(A) + QM(A)

The notation "ASIL B(D)" means "developed to ASIL B requirements, retains the integrity context of an ASIL D parent" — the trace back to the original safety goal stays at D for downstream artefacts (audits, change impact analysis), even though the development rigour is B. QM means "quality management" — no functional-safety integrity claim, governed by ISO 9001-style quality processes.

The most common pattern in production vehicles is the second row of ASIL D: ASIL B(D) + ASIL B(D). Two redundant safety mechanisms, each at ASIL B, jointly delivering an ASIL D safety goal. Tier-1 suppliers like it because two ASIL B parts are usually a third the cost of one ASIL D part. OEMs like it because it produces a more diverse, more debuggable architecture. Reviewers like it because the independence claim is auditable through the fault tree.

What decomposition is not Decomposition is not a way to dodge ASIL D requirements by relabelling the same component twice. It is not "we have two channels of ASIL B software so we're done". It is not applicable when the two mechanisms share a single point of failure — a common ECU, a common power supply, a common sensor, a common bus, a common operating system, a common compiler bug. The rule presupposes independence, and ISO 26262 §5.4.6 requires that independence be demonstrated, not asserted. The demonstration tool is FTA, which is what the rest of this guide is about.

Step 1The decomposition rule, formally

Suppose the safety goal SG-1 has been classified ASIL D — say "the vehicle shall not unintentionally accelerate". The hazard analysis (HARA) attaches an Exposure / Controllability / Severity classification that yields ASIL D under Part 3 Table 4. Without decomposition, every safety mechanism that contributes to enforcing SG-1 inherits ASIL D in full.

Decomposition rewrites this as: SG-1 is enforced by two safety mechanisms M1 and M2, both targeting the same hazard, each developed to ASIL B(D). The safety goal is violated only if both M1 and M2 fail. Three conditions all have to hold:

  1. Each mechanism, considered alone, is capable of preventing the hazard. Both M1 and M2 must be sufficient to enforce SG-1 individually. This rules out partial decompositions like "M1 handles the high-speed case, M2 handles the low-speed case" — neither alone covers the whole hazard space, so each is doing different work and the AND structure doesn't apply.
  2. The two mechanisms are sufficiently independent. This is the load-bearing condition. ISO 26262 Part 9 §5.4.4 lists the specific independence aspects to consider: shared causes of failure (cascading failures, common-cause failures, common-mode failures) at hardware, software, and execution-environment level. The fault tree is what enumerates and quantifies these aspects.
  3. The integrity context (the parenthesised parent ASIL) propagates through the design. Configuration management, change impact analysis, requirements tracing and audit trail all stay at the parent ASIL — only the technical-rigour requirements relax. This is the part most teams forget; it's why an ASIL B(D) Jira ticket is treated differently from an ASIL B ticket on a different project.

Of these, condition 2 is the only one that requires technical analysis to defend. Conditions 1 and 3 are organisational. The whole purpose of running an FTA in the decomposition workflow is to show that condition 2 holds — and that if it doesn't, the decomposition is invalid and the per-mechanism ASIL has to be raised back to the parent.

Step 2The independence requirement, and how FTA proves it

ISO 26262 Part 9 §5.4.4 lists three categories of independence aspect that have to be considered for any decomposition:

  1. Random hardware failures — cascading failures (one mechanism's failure causes the other's) and common-cause failures (a shared physical cause fails both at once).
  2. Systematic failures — common-mode failures rooted in shared design choices: a shared software component, a shared compiler / toolchain, a shared firmware library, identical implementations of "diverse" code.
  3. Shared execution environment — common power supply, common clock, common bus, common RAM, common operating system, common physical enclosure subject to the same EMI / vibration / temperature.

The fault tree is the formal artefact that maps each of these aspects to a structural property of the cut sets. The decomposition stands if and only if the fault tree's minimal cut sets satisfy three conditions:

  1. No minimal cut set has order 1. Any single-event cut is a single point of failure that defeats the AND structure entirely.
  2. No basic event appears in both mechanism branches. A shared event puts itself at the root of a cascading-failure cut set.
  3. No β-factor CCF group spans both branches. Any group that does adds a CCF basic event sitting structurally above both branches at order 1.

Here is the decomposed tree shape that should appear after Step 2:

SG-1 violated
       │
       ▼
      AND
     /   \
    M1   M2     ← two safety mechanisms, ASIL B(D) each
   / \   / \
  …   … …   …  ← branch sub-trees, no shared events

And here are the three patterns that make the decomposition fail in practice. Each one collapses the AND gate to an effective OR by introducing a path that bypasses the redundancy:

Failure pattern 1 — cascading failure

M1's actuator overdrives a shared 12 V bus. The bus voltage transient takes out M2's controller. In the fault tree, the basic event "bus over-voltage" is a child of an event in M1's branch and a parent of an event in M2's branch. Once the algebra reduces the tree, the cut set {bus over-voltage} (order 1) appears in the minimal cut set list. The decomposition fails — both mechanisms can be killed by a single hardware event.

Failure pattern 2 — common-cause failure

Both mechanisms use sensors from the same vendor batch with the same calibration drift. Modelled as a CCF group with β = 0.05, the basic event CCFshared-batch is structurally above both mechanism branches and produces a single-event cut set at order 1. The decomposition is degraded by exactly β: the effective parent ASIL of the safety goal is now somewhere between B and D, and the per-mechanism ASIL has to be raised. Article 5 covers the modelling math.

Failure pattern 3 — common-mode failure

The "diverse" software in M1 and M2 was written by the same team using the same coding style and the same standard library. A bug in the shared memcpy wrapper trips both. This is the hardest pattern to model — there is no shared basic event in the fault tree because the two mechanisms are distinct code paths; the failure mode lives in a meta-model of "shared design choices". ISO 26262 Part 6 §7.4.13 gives the qualitative argument structure (diversity of teams, languages, toolchains, design philosophies); the FTA gets the residual common-mode probability as an explicit basic event placed above both branches with a defended probability.

The systematic way to run the independence check is to expand the fault tree, run the cut-set analysis, and inspect the order-1 minimal cut sets. If there are none, and no basic event appears in both branches, the decomposition holds. If there are any, the work is to identify which independence aspect they violate and either redesign the mechanism (eliminate the shared cause) or accept the higher-ASIL development burden (no decomposition).

Decomposition + diagnostic coverage — the more common pattern In practice, two truly independent mechanisms are rare. The more common production pattern is one primary mechanism (e.g. ASIL B(D)) with diagnostic coverage that detects its failures, plus a secondary mechanism (e.g. ASIL B(D) again) that handles the case where the primary fails undetected. ISO 26262 Part 5 §9.4.2.2 gives the formula: the safety goal violation requires (primary fails) AND (diagnostic missed it) AND (secondary fails). The fault tree captures the structure naturally — the diagnostic appears as a third branch under the AND, with the basic event "diagnostic missed it" attributed via the diagnostic coverage (DC) percentage that ISO 26262 publishes per failure mode in Part 5 Annex D.

Step 3Worked AEB ASIL D decomposition

To make the workflow concrete, take Automatic Emergency Braking — specifically the safety goal SG-AEB: "The vehicle shall apply emergency braking when a collision with a stationary obstacle is imminent at speeds between 30 and 130 km/h." A standard HARA classification (high speed → S3 severity, no driver override at typical reaction times → C3 controllability, frequently encountered → E4 exposure) places this at ASIL D.

Target the canonical decomposition: ASIL D = ASIL B(D) + ASIL B(D), with two redundant detection-plus-actuation chains. The architecture sketch:

SG-AEB violated (no brake when obstacle imminent)
              │
              ▼
             AND
            /   \
   M1: PRIMARY   M2: SECONDARY
    (ASIL B(D))   (ASIL B(D))
    │             │
    Radar         LiDAR
    Camera        Independent fusion ECU
    Fusion ECU    Independent controller
    Primary ctrl  Secondary brake circuit
    Brake act #1  Brake act #2

First-pass tree — and the SPOF that wrecks it

Every Tier-1's first-cut AEB architecture has a single brake actuator. Production cars have one set of brake calipers per wheel; doubling the actuator means doubling the hydraulic system. So the naive decomposition tree has both M1 and M2 issuing brake commands to the same brake controller, and that controller becomes a basic event in both mechanism branches. Cut-set analysis on the naive tree:

Minimal cut sets (naive, single brake actuator):
  {brake-actuator-fail}                            ← order 1, SPOF
  {radar-fail, LiDAR-fail}                         ← order 2, sensor diversity
  {camera-fail, LiDAR-fail}                        ← order 2
  {fusion-ECU-fail, secondary-fusion-fail}         ← order 2
  {primary-controller-fail, secondary-controller-fail}  ← order 2
  ...

The order-1 cut {brake-actuator-fail} means the decomposition is invalid as drawn — a single brake-actuator failure produces SG-AEB violation regardless of how independent the upstream chains are. The whole architecture has to be revised before the decomposition stands: either a dual-redundant brake actuator (expensive), an actuator with full ASIL D diagnostic coverage that's then claimed at ASIL D outside the decomposition (the more common compromise), or a fail-safe actuator design where any internal fault produces brake application (the safest direction).

Second-pass tree — refined architecture

Take the dual-redundant-actuator path for the worked example. M1 drives a primary brake circuit; M2 drives an independent backup hydraulic / electromechanical actuator (Continental's MK C2 plus a secondary axle-level actuator is the production reference). The cut-set list becomes:

Cut setOrderM1 componentM2 component
{radar, LiDAR}2RadarLiDAR
{camera, LiDAR}2CameraLiDAR
{fusion-ECU, sec-fusion}2Fusion ECUSecondary fusion ECU
{primary-ctrl, sec-ctrl}2Primary controllerSecondary controller
{brake-act-1, brake-act-2}2Brake actuator #1Brake actuator #2

Every cut set has order 2 with one event in each mechanism branch. Independence condition (i) and (ii) from Step 2 hold structurally. Condition (iii) — no β-factor CCF group spanning both branches — is the next thing to check.

Quantification — the PMHF check

ASIL D requires PMHF ≤ 10⁻⁸ per hour. With the refined architecture, assume each mechanism has a dangerous-undetected failure rate of λDU = 10⁻⁷/h (typical ASIL B target for a redundant chain). For a two-channel 1-out-of-2 system, the PMHF formula from ISO 26262 Part 5 §9.4.2.2, with β-factor CCF (vehicle lifetime T = 10⁴ h, β = 0.05):

PMHF ≈ β · λDU + (1 − β) · λDU² · T / 2
     = 0.05 × 10⁻⁷ + 0.95 × (10⁻⁷)² × 10⁴ / 2
     = 5.0×10⁻⁹ + 4.8×10⁻¹¹
     ≈ 5.05×10⁻⁹ /h

5×10⁻⁹/h ≤ 10⁻⁸/h. The decomposition meets ASIL D — but only by a factor of two, and the β·λDU term alone consumes half the entire ASIL D budget. The independent-failures term is a rounding error by comparison.

Run the same calculation at three β values to see the sensitivity:

β-factorPMHFvs ASIL D target (10⁻⁸/h)
0.02 (well-defended, separated, diverse)2.05×10⁻⁹/h0.20× — comfortable margin
0.05 (typical with diversity)5.05×10⁻⁹/h0.51× — meets target
0.10 (some diversity, shared environment)1.00×10⁻⁸/h1.00× — at the boundary, fails margin
0.20 (poor independence)2.00×10⁻⁸/h2.00× — fails ASIL D

The decomposition is only valid when β < 0.10. Above that, the CCF event alone violates the ASIL D PMHF target, regardless of how good the individual mechanisms are. This is what makes the independence demonstration the central deliverable of a decomposition safety case — without it, the whole architecture is paper.

The design conclusions, ranked by leverage:

The Fussell-Vesely importance of the CCF basic event tells the same story Run the importance ranking on this tree (using the rules from Article 2) and the CCF basic event will sit at F-V ≈ 0.99 — almost the entire P(TOP) flows through it. The individual component events are at F-V ≈ 0.01 each. The importance ranking is the FTA's way of saying "stop trying to make the parts more reliable; make the architecture more independent". Same message as the PMHF table above, in a more reusable format.

Step 4How decomposition actually shows up in production

Outside textbook examples, the symmetric ASIL B(D) + ASIL B(D) split is the minority pattern. Four production patterns are more common, each with its own FTA structure:

PatternDecompositionFTA structureWhere you see it
Lockstep dual-core MCU Two physically separate cores running the same code in lockstep, hardware compares outputs every cycle — nominally ASIL D directly, but often documented as ASIL B(D) + ASIL B(D) when the lockstep monitor is treated as a separate mechanism. AND of (compute path) and (lockstep monitor) — two basic events, the monitor's β to the compute path is the limiting factor. Infineon AURIX (TC2xx, TC3xx), Renesas RH850/F1KH, NXP S32G — the dominant automotive MCU pattern.
Primary + diagnostic + safe-state ASIL D = ASIL B(D) primary + ASIL B(D) diagnostic with high diagnostic coverage triggering a safe state. Three-branch AND: (primary fails) AND (diagnostic missed) AND (safe-state failed). DC% from Part 5 Annex D enters as the "diagnostic missed" probability. EPS (electric power steering), throttle-by-wire, AEB activation logic where dual hardware is too expensive.
Cross-domain redundancy Two functionally distinct domains that can each enforce the same safety goal — e.g. stability control via brakes + via steering. OR-of-ANDs structure where each path is itself a multi-component AND; basic events of the two paths are in genuinely different physical subsystems. Steer-by-wire backup steering via differential braking; level-3 ADAS handover assurance.
ASIL D + QM(D) decomposition One ASIL D mechanism + one QM-developed monitor. The QM monitor provides a sanity check; failure of the QM monitor alone has no safety consequence. Single-branch tree at ASIL D. The QM monitor adds a low-effort "did I detect drift" branch that doesn't quantitatively shift the answer but is auditable as defence-in-depth. Many ASIL D safety goals where genuine decomposition is impossible but a software watchdog is added for in-field diagnostics.

Whichever pattern is used, the FTA artefact is the same shape: a top-event-violation tree where every minimal cut set has order ≥ 2 (or order 1 with a defended ASIL D basic event), no basic event appears in two branches, and CCF groups are explicitly declared with β-factor values that can be defended.

Five pitfalls a reviewer will catch

Where to go next